SHAFT Board

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The SHAFT board (Switch Header And Functional Tester) is a board designed to interface to the mortise switch inputs on a Sx/Px lock controller and allow either an application written on the SHAFT microprocessor or an external application to emulate mortise switch activity. This allows the controller's mortise state machine to be stressed, and also to emulate various door conditions, such as door ajar, door forced, request to exit, etc.

Although the easiest path would have been to just have a serial interface to the microcontroller, we have hundreds of older DPAC 501 WiFi modules laying around. The 501's are 802.11/b only, and customers were demanding 802.11/bg support, which is provided in the newer 551's are 802.11/bg. Figuring that it would be a good way to put these older modules to some use, and to avoid having to buy Ethernet-to-serial bridges, I designed the board to support any flavor of the DPAC modules.

Of course, I had my own motives for wanting a little board that supported a WiFi module that I had ready access to. One such project is using it for my DSC Alarm Status Indicator. Another candidate project for this board is the CPR Kennel Monitor, although that may warrant using something with a cellular data radio, to avoid reliance on the farm's DSL line in the event of a kennel emergency.

The SHAFT board is not a complex device. It consists of a Microchip PIC18F26K22 processor with an 18.432MHz oscillator, 128K x 8 I2C NVRAM, DPAC connector, 3.3V switching power supply, 3.3V linear regular (if the DPAC is not used), 4 general purpose push buttons with a co-located bi-color LEDs, a DPAC factory reset push button, a bi-color LED for indicating processor status, a red power LED, and several connectors.

Two of the connectors are RJ-12's, of which one is connected to EUSART0 on the PIC, and the other which is a pass-through to the 24-pin connector used to connect to the lock controller. Also present is a 10-pin programming connector. The 24 pin connector has an I2C bus available, 4 open-collector outputs (using 2N7002 FETs), and 4 connections to the 4 general purpose push buttons. The raw input voltage (before the protection diode) and 3.3V is also present on the connector.

The DPAC is connected to EUSART1 on the PIC, along with several of the DPAC's control signals (RTS, CTS, reset and connect status).

(Note that the images show a version 1 board, which did not have the DPAC factory reset switch. Version 2 boards have not been produced at this time).

The intent is a custom application written around a basic framework would allow various tests to be performed. One scenario would be a "server" application written on the PIC that would allow commands received over the DPAC to generate switch open and closure events to emulate a door being opened, forced, secured, etc.

In addition, the application may assign the push buttons to various functions so that the same functions could be performed locally at the press of a button.

The 128K x 8 NVRAM is uncommitted, but could be used to do over-the-air (OTA) upgrades of the PIC's firmware. A new application would be downloaded to the NVRAM, the PIC reset, then a bootloader would check for an application image present in the NVRAM, and if found, update the PIC's flash.

A guide to configuring the DPAC module may be found at on the DPAC Configuration page.